instruction level simulation
英 [ɪnˈstrʌkʃn ˈlevl ˌsɪmjuˈleɪʃn]
美 [ɪnˈstrʌkʃn ˈlevl ˌsɪmjuˈleɪʃn]
【计】指令级模拟
双语例句
- SCV-based random instruction generation tool used for generation of MIPS instructions in a system level modeling and simulation environment of SystemC was introduced.
该随机指令生成工具包括静态生成与动态生成两种工作模式。 - Figure an investigation on instruction level simulation
数字系统指令级模拟的研究 - The instruction level simulation discussed in this paper is a system simulation for a CPU, and is also an effective software debugging tool.
本文论述的指令级模拟，是计算机主机的一种系统模拟，也可作为一种有效的软件调试工具。